Harry J.M. Veendrick joined Philips Research Laboratories in 1977, where he has been involved in the design of memories, gate arrays and complex video-signal processors. His principal research interests include the design of low-power and high-speed complex digital ICs, with an emphasis on nanometre-scale physical effects and scaling aspects. Complementary to this is his interest in IC technology.In 2002 he received a PhD in electronic engineering from the Technical University of Eindhoven, the Netherlands. He was a Research Fellow at Philips Research Labs and NXP Research and has been a Visiting Professor to the Department of Electronic and Electrical Engineering of the University of Strathclyde, Glasgow, Scotland, UK.In 2006 he continued his research at NXP, which is the 2006 spin-off of the disentangled former Philips Semiconductors Product and R&D Departments. In May 2009 he has left NXP Research and started his own training activity teaching 1-day, 3-day and 5-day courses for different target audiences. He (co-)authors many patents and publications on robust, high-performance and low-power CMOS IC design and has contributed to many conferences and workshops, as reviewer, speaker, invited speaker, panellist, organizer, guest editor and programme committee member. In addition, he is the author of MOS ICs (VCH 1992), Deep-Submicron CMOS ICs (Kluwer Academic Publishers: first edition 1998 and second edition 2000) and Nanometer CMOS ICs, first edition 2008. He is a co-author of Low-Power Electronics Design (CRC Press, 2004).