Luca Gaetano Amaru is a Senior II, R&D Engineer at Synopsys Inc., Mountain View, CA. Formerly, he was a research assistant and PhD student in Computer Science at EPFL, Integrated Systems Laboratory, Lausanne, Switzerland, where he worked on new data structures and algorithms for logic synthesis and verification, under the direction of Prof. De Micheli, Dr. Gaillardon and Prof. Burg. He received his Bachelor's Degree in Electronic Engineering, with honors, from Politecnico di Torino, Italy, in 2009. In 2011 he received his double Master's Degree in Electronic Engineering, with honors, from Politecnico di Torino, Italy, and Politecnico di Milano, Italy. In 2014, he was a visiting researcher at Stanford University, Palo Alto, CA, USA.